85 lines
2.1 KiB
C
Executable File
85 lines
2.1 KiB
C
Executable File
// Copyright 2022-2023 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <soc/soc.h>
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#define TIMER0_REG_SET(reg_id, l, h, v) REG_SET((SOC_TIMER0_REG_BASE + ((reg_id) << 2)), (l), (h), (v))
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#define TIMER0_PERIOD 0xFFFFFFFF
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static inline uint32_t timer_hal_get_timer0_cnt(void)
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{
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volatile uint32_t int_level = 0;
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uint32_t cnt = 0;
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int_level = rtos_enter_critical();
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TIMER0_REG_SET(8, 2, 3, 0);
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TIMER0_REG_SET(8, 0, 0, 1);
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while (REG_READ((SOC_TIMER0_REG_BASE + (8 << 2))) & BIT(0));
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cnt = REG_READ(SOC_TIMER0_REG_BASE + (9 << 2));
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rtos_exit_critical(int_level);
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return cnt;
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}
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static inline uint32_t timer_hal_diff(uint32_t begin, uint32_t end)
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{
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if (end > begin) {
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return end - begin;
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} else {
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return (TIMER0_PERIOD - begin + end);
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}
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}
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void timer_hal_us_init(uint32_t us)
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{
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TIMER0_REG_SET(2, 0, 0, 1);
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REG_WRITE((SOC_TIMER0_REG_BASE + (4 << 2)), TIMER0_PERIOD);
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TIMER0_REG_SET(7, 0, 0, 1);
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SYS_REG_SET(0xc, 4, 4, 1);
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SYS_REG_SET(8, 20, 20, 1);
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}
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/**
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* TODO optimize it!
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*
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* If we need very accurate delay, please write your owner delay!
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*
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* Test Result:
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* us actual
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* --------------------------------
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* 1 | 8.8
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* 2 | 8.8
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* 3 | 8.4
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* 4 | 10
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* 5 | 9.6
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* 100 | 106
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* 1000 | 1007
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*/
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void timer_hal_delay_us(uint32_t us)
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{
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uint32_t delay_cycle = 26 * us;
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if ((REG_READ(SOC_TIMER0_REG_BASE + (7 << 2)) & BIT(0)) == 0) {
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TIMER0_REG_SET(7, 0, 0, 1);
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}
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uint32_t begin = timer_hal_get_timer0_cnt();
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uint32_t end;
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uint32_t diff;
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do {
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end = timer_hal_get_timer0_cnt();
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diff = timer_hal_diff(begin, end);
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} while (diff < delay_cycle);
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}
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