195 lines
3.6 KiB
C
Executable File
195 lines
3.6 KiB
C
Executable File
// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <soc/soc.h>
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#include "icu_hw.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ICU_LL_REG_BASE() (SOC_ICU_REG_BASE)
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static inline void clock_ll_set_dco_clk_1_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_dco_clk_2_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_dco_clk_4_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_dco_clk_8_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_qspi_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_qspi_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_qspi_clk_120m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_qspi_clk_80m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_pwms_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_pwms_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_enable_pwm_lpo_clk(icu_hw_t *hw, uint32_t chan)
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{
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}
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static inline void clock_ll_disable_pwm_lpo_clk(icu_hw_t *hw, uint32_t chan)
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{
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}
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static inline void clock_ll_set_saradc_enable_audio_pll(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_saradc_disable_audio_pll(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_efuse_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_efuse_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_sdio_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_sdio_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_saradc_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_saradc_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_spi_clk_dco(icu_hw_t *hw, uint32_t id)
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{
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}
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static inline void clock_ll_set_spi_clk_26m(icu_hw_t *hw, uint32_t id)
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{
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}
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static inline void clock_ll_set_irda_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_irda_clk_26m(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2c_clk_dco(icu_hw_t *hw, uint32 id)
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{
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}
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static inline void clock_ll_set_i2c_clk_26m(icu_hw_t *hw, uint32 id)
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{
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}
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static inline void clock_ll_set_uart_clk_26m(icu_hw_t *hw, uint32_t id)
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{
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}
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static inline void clock_ll_set_uart_clk_dco(icu_hw_t *hw, uint32_t id)
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{
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}
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static inline void clock_ll_set_26m_clk_1_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_26m_clk_2_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_26m_clk_4_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_26m_clk_8_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_1_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_2_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_4_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_8_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_16_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_i2s_mclk_32_div(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_cec_clk_dco(icu_hw_t *hw)
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{
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}
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static inline void clock_ll_set_cec_clk_26m(icu_hw_t *hw)
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{
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}
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static inline uint32_t clock_ll_get_uart_clk(icu_hw_t *hw, uint32_t id)
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{
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return 0;
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}
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#ifdef __cplusplus
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}
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#endif
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