186 lines
5.3 KiB
C
186 lines
5.3 KiB
C
// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include "boot.h"
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#include "reset_reason.h"
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#include <os/os.h>
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#include "bk_arch.h"
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#include "stack_base.h"
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#include "bk_uart.h"
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#include "bk_rtos_debug.h"
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#include <os/os.h>
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struct arm9_register
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{
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uint32_t r0;
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uint32_t r1;
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uint32_t r2;
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uint32_t r3;
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uint32_t r4;
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uint32_t r5;
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uint32_t r6;
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uint32_t r7;
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uint32_t r8;
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uint32_t r9;
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uint32_t r10;
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uint32_t fp;
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uint32_t ip;
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uint32_t sp;
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uint32_t lr;
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uint32_t pc;
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uint32_t spsr;
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uint32_t cpsr;
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};
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/**
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* this function will show registers of CPU
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*
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* @param regs the registers point
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*/
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void arch_dump_cpu_registers (struct arm9_register *regs)
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{
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os_printf("Current regs:\n");
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os_printf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n",
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regs->r0, regs->r1, regs->r2, regs->r3);
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os_printf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n",
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regs->r4, regs->r5, regs->r6, regs->r7);
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os_printf("r08:0x%08x r09:0x%08x r10:0x%08x\n",
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regs->r8, regs->r9, regs->r10);
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os_printf("fp :0x%08x ip :0x%08x\n",
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regs->fp, regs->ip);
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os_printf("sp :0x%08x lr :0x%08x pc :0x%08x\n",
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regs->sp, regs->lr, regs->pc);
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os_printf("SPSR:0x%08x\n", regs->spsr);
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os_printf("CPSR:0x%08x\n", regs->cpsr);
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const unsigned int *reg_fiq, *reg_irq, *reg_und, *reg_abt, *reg_svc, *reg_sys;
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int i;
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reg_fiq = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_FIQ;
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reg_irq = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_IRQ;
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reg_und = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_UND;
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reg_abt = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_ABT;
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reg_svc = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_SVC;
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reg_sys = (const unsigned int *)MCU_REG_BACKUP_BOTTOM_SYS;
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os_printf("\nseparate regs:\n");
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os_printf(" reg FIQ IRQ UND ABT SVC SYS\r\n");
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os_printf("------ ---------- ---------- ---------- ---------- ---------- ----------\r\n");
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os_printf("%-6s 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n", "cpsr", reg_fiq[0], reg_irq[0],
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reg_und[0], reg_abt[0], reg_svc[0], reg_sys[0]);
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os_printf("%-6s 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n", "spsr", reg_fiq[1], reg_irq[1],
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reg_und[1], reg_abt[1], reg_svc[1], reg_sys[1]);
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os_printf("%-6s 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n", "r13-SP", reg_fiq[7], reg_irq[7],
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reg_und[7], reg_abt[7], reg_svc[7], reg_sys[7]);
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os_printf("%-6s 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\r\n", "r14-LR", reg_fiq[8], reg_irq[8],
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reg_und[8], reg_abt[8], reg_svc[8], reg_sys[8]);
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//display backup R8~R12 of FIQ
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for (i=2; i<7; i++) {
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os_printf("r%-5d 0x%08x %-10s %-10s %-10s %-10s %-10s\r\n", i+6, reg_fiq[i],
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"-", "-", "-", "-", "-");
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}
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os_printf("\r\n");
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}
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static void arch_dump_exception_info(const char* exception_str, struct arm9_register *regs)
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{
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os_printf("%s\n", exception_str);
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arch_dump_cpu_registers(regs);
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rtos_dump_task_list();
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rtos_dump_backtrace();
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arch_dump_exception_stack();
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}
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/**
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* When ARM7TDMI comes across an instruction which it cannot handle,
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* it takes the undefined instruction trap.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void boot_exception_undefine(struct arm9_register *regs)
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{
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bk_misc_set_reset_reason(CRASH_UNDEFINED_VALUE);
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arch_dump_exception_info("undefined instruction", regs);
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rtos_shutdown();
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}
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/**
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* The software interrupt instruction (SWI) is used for entering
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* Supervisor mode, usually to request a particular supervisor
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* function.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void boot_exception_swi(struct arm9_register *regs)
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{
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arch_dump_exception_info("software interrupt", regs);
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rtos_shutdown();
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}
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/**
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* An abort indicates that the current memory access cannot be completed,
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* which occurs during an instruction prefetch.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void boot_exception_prefetch_abort(struct arm9_register *regs)
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{
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bk_misc_set_reset_reason(CRASH_PREFETCH_ABORT_VALUE);
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arch_dump_exception_info("prefetch abort", regs);
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rtos_shutdown();
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}
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/**
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* An abort indicates that the current memory access cannot be completed,
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* which occurs during a data access.
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void boot_exception_data_abort(struct arm9_register *regs)
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{
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bk_misc_set_reset_reason(CRASH_DATA_ABORT_VALUE);
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arch_dump_exception_info("data abort", regs);
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rtos_shutdown();
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}
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/**
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* Normally, system will never reach here
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*
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* @param regs system registers
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*
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* @note never invoke this function in application
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*/
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void boot_exception_reserved(struct arm9_register *regs)
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{
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bk_misc_set_reset_reason(CRASH_UNUSED_VALUE);
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arch_dump_exception_info("not used", regs);
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rtos_shutdown();
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}
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