103 lines
3.3 KiB
C
Executable File
103 lines
3.3 KiB
C
Executable File
/*
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* Copyright (c) 2012-2021 Andes Technology Corporation
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* All rights reserved.
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*
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*/
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#ifndef __PMP_H__
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#define __PMP_H__
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/* Check platform support which PMP scheme!
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* CLIC platform only support NAPOT scheme! */
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#define USE_NAPOT 0
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#define USE_TOR !(USE_NAPOT)
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#define SCHEME_NAPOT 3
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#define SCHEME_NA4 2
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#define SCHEME_TOR 1
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#define SCHEME_OFF 0
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#define NAPOT(base, size) (unsigned long)(((size) > 0) ? ((((unsigned long)(base) & (~((unsigned long)(size) - 1))) >> 2) | (((unsigned long)(size) - 1) >> 3)) : 0)
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#define TOR(top) (unsigned long)((unsigned long)(top) >> 2)
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#define PMP_L_OFF 0
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#define PMP_L_ON 1
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#define PMP_A_OFF 0
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#define PMP_A_TOR SCHEME_TOR
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#define PMP_A_NA4 SCHEME_NA4
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#define PMP_A_NAPOT SCHEME_NAPOT
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#define PMP_X_OFF 0
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#define PMP_X_ON 1
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#define PMP_W_OFF 0
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#define PMP_W_ON 1
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#define PMP_R_OFF 0
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#define PMP_R_ON 1
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/* attribute is used for PA */
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#define PMPCFG_ALXWR(a,l,x,w,r) (((a) << 3) | ((l) << 7) | ((x) << 2) | ((w) << 1) | ((r) << 0))
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/* Machine CSR */
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#define MSTATUS_MPP_MSK ((1ULL << 11) | (1ULL << 12))
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#define MSTATUS_MPP_USER (0ULL << 11)
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#define MSTATUS_MPP_SV (1ULL << 11)
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#define MSTATUS_MPP_MC ((1ULL << 11) | (1ULL << 12))
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/* Supervisor CSR */
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#define SSTATUS_SPP_MSK (1ULL << 8)
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/* Hart mode for machine/supervisor/user */
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#define HART_USER 0x0
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#define HART_SV 0x1
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#define HART_MC 0x3
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#define KB (0x1 << 10)
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enum
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{
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ENTRY_PMPADDR0 = 0,
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ENTRY_PMPADDR1,
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ENTRY_PMPADDR2,
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ENTRY_PMPADDR3,
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ENTRY_PMPADDR4,
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ENTRY_PMPADDR5,
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ENTRY_PMPADDR6,
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ENTRY_PMPADDR7,
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ENTRY_PMPADDR8,
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ENTRY_PMPADDR9,
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ENTRY_PMPADDR10,
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ENTRY_PMPADDR11,
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ENTRY_PMPADDR12,
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ENTRY_PMPADDR13,
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ENTRY_PMPADDR14,
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ENTRY_PMPADDR15,
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ENTRY_PMPADDR_COUNT
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};
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enum
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{
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ENTRY_PMPCFG0 = 0,
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ENTRY_PMPCFG1,
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ENTRY_PMPCFG2,
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ENTRY_PMPCFG3,
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};
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typedef struct {
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uint8_t pmp_entry;
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uint8_t pmp_config;
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/*
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union
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{
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struct
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{
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volatile uint8_t R : 1; //[0], Read Access Control
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volatile uint8_t W : 1; //[1], Write Access Control
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volatile uint8_t X : 1; //[2], Instruction execution Control
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volatile uint8_t A : 2; //[4:3], Address matching mode
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volatile uint8_t reserved : 2; //[6:5],
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volatile uint8_t L : 1; //[7], Write Lock and permission enforcement bit for Machine mode
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};
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uint8_t value;
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}pmp_config;
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*/
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void *pmp_addr;
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} pmp_config_t;
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#endif // __PMP_H__
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