137 lines
2.8 KiB
C
Executable File
137 lines
2.8 KiB
C
Executable File
#include <common/bk_include.h>
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#include "adc_hal.h"
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#include "power_driver.h"
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#include "clock_driver.h"
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#include "icu_driver.h"
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#include "bk_sys_ctrl.h"
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#include "bk_drv_model.h"
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//TODO the adc_hal should reset the ADC => by Frank!!!
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bk_err_t adc_hal_init(adc_hal_t *hal)
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{
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hal->hw = (adc_hw_t *)ADC_LL_REG_BASE();
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adc_ll_init(hal->hw);
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adc_ll_wait_4_cycle(hal->hw);
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adc_ll_disable_bypass_calib(hal->hw);
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adc_hal_set_saturate_mode(hal, ADC_INIT_SATURATE_MODE);
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return BK_OK;
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}
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bk_err_t adc_hal_deinit(adc_hal_t *hal)
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{
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adc_ll_deinit(hal->hw);
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return BK_OK;
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}
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bk_err_t adc_hal_set_clk(adc_hal_t *hal, adc_src_clk_t src_clk, uint32_t adc_clk)
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{
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uint32_t pre_div = 0;
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if (src_clk == ADC_SCLK_32M) {
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adc_ll_enable_32m_clk(hal->hw);
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pre_div = ADC_SRC_32M_CLK/2/adc_clk -1;
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} else {
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adc_ll_disable_32m_clk(hal->hw);
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}
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if (src_clk == ADC_SCLK_XTAL_26M) {
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clk_set_saradc_clk_26m();
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pre_div = ADC_SRC_26M_CLK/2/adc_clk -1;
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} else if (src_clk == ADC_SCLK_DCO) {
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clk_disable_saradc_audio_pll();
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clk_set_saradc_clk_dco();
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pre_div = ADC_SRC_DCO_CLK/2/adc_clk -1;
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} else if (src_clk == ADC_SCLK_DPLL) {
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clk_set_saradc_clk_dco();
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clk_enable_saradc_audio_pll();
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pre_div = ADC_SRC_DPLL_CLK/2/adc_clk -1;
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}
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adc_ll_set_pre_div(hal->hw, pre_div);
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return BK_OK;
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}
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#if SARADC_AUTOTEST
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bk_err_t adc_hal_set_div(adc_hal_t *hal, uint32_t div)
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{
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uint32_t pre_div = div;
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adc_ll_disable_32m_clk(hal->hw);
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clk_set_saradc_clk_26m();
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adc_ll_set_pre_div(hal->hw, pre_div);
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return BK_OK;
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}
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#endif
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bk_err_t adc_hal_set_mode(adc_hal_t *hal, adc_mode_t adc_mode)
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{
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if(adc_mode == ADC_SOFTWARE_CONTRL_MODE) {
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adc_ll_set_software_control_mode(hal->hw);
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} else if (adc_mode == ADC_CONTINUOUS_MODE) {
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adc_ll_set_continuous_mode(hal->hw);
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}else {
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adc_ll_set_single_step_mode(hal->hw);
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}
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return BK_OK;
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}
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bk_err_t adc_hal_set_saturate_mode(adc_hal_t *hal, adc_saturate_mode_t mode)
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{
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uint32 saturate_mode = 0;
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if (mode == ADC_SATURATE_MODE_NONE) {
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adc_ll_disable_sat_process(hal->hw);
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return BK_OK;
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}
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if (mode == ADC_SATURATE_MODE_0) {
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saturate_mode = 0;
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} else if (mode == ADC_SATURATE_MODE_1) {
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saturate_mode = 1;
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}
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#if ADC_ACURACY_12_BIT
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else if (mode == ADC_SATURATE_MODE_2) {
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saturate_mode = 2;
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}
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#endif
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else {
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saturate_mode = 3;
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}
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adc_ll_set_sat_ctrl(hal->hw, saturate_mode);
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adc_ll_enable_sat_process(hal->hw);
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return BK_OK;
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}
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bk_err_t adc_hal_start_commom(adc_hal_t *hal)
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{
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adc_ll_enable(hal->hw);
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return BK_OK;
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}
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bk_err_t adc_hal_stop_commom(adc_hal_t *hal)
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{
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adc_ll_disable(hal->hw);
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return BK_OK;
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}
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uint16_t adc_hal_get_single_step_adc_data(adc_hal_t *hal)
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{
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uint16_t value = 0;
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uint32_t mode = 0;
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mode = adc_hal_get_mode(hal);
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BK_WHILE_DO(mode, mode = adc_hal_get_mode(hal));
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value = adc_hal_get_adc_data(hal);
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return value;
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}
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