309 lines
12 KiB
C
309 lines
12 KiB
C
#ifndef __SDIO_DRIVER_H__
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#define __SDIO_DRIVER_H__
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#include <common/bk_include.h>
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#include "bk_uart.h"
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#define SDCARD_DEBUG
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#ifdef SDCARD_DEBUG
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#if CONFIG_SOC_BK7256XX
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#define SD_TAG "sd"
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#define SDCARD_PRT(...) BK_LOGI(SD_TAG, ##__VA_ARGS__)
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#define SDCARD_WARN(...) BK_LOGW(SD_TAG, ##__VA_ARGS__)
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#define SDCARD_FATAL(...) BK_LOGE(SD_TAG, ##__VA_ARGS__)
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#define SDCARD_DBG(...) BK_LOGD(SD_TAG, ##__VA_ARGS__)
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#else
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#define SDCARD_PRT os_printf
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#define SDCARD_WARN warning_prf
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#define SDCARD_FATAL fatal_prf
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#define SDCARD_DBG null_prf
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#endif
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#else
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#define SDCARD_PRT null_prf
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#define SDCARD_WARN null_prf
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#define SDCARD_FATAL null_prf
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#define SDCARD_DBG null_prf
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#endif
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/* SDCARD Register*/
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#if (CONFIG_SOC_BK7271)
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#define SDCARD_BASE_ADDR (0x00802300)
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#elif (CONFIG_SOC_BK7256XX)
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#define SDCARD_BASE_ADDR (0x448B0000)
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#else
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#define SDCARD_BASE_ADDR (0x00802D00)
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#endif
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#define REG_SDCARD_CMD_SEND_CTRL (SDCARD_BASE_ADDR + 0*4)
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#define SDCARD_CMD_SEND_CTRL_CMD_START (1 << 0) //Read & Write, Auto clear by ASIC.
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#define SDCARD_CMD_SEND_CTRL_CMD_FLAGS_MASK (0x7)
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#define SDCARD_CMD_SEND_CTRL_CMD_FLAGS_POSI (1)
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#define SDCARD_CMD_SEND_CTRL_CMD_INDEX_MASK (0x3f)
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#define SDCARD_CMD_SEND_CTRL_CMD_INDEX_POSI (4)
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#define REG_SDCARD_CMD_SEND_AGUMENT (SDCARD_BASE_ADDR + 1*4)
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#define REG_SDCARD_CMD_RSP_TIMER (SDCARD_BASE_ADDR + 2*4)
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#define REG_SDCARD_DATA_REC_CTRL (SDCARD_BASE_ADDR + 3*4)
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#define SDCARD_DATA_REC_CTRL_DATA_EN (1 << 0) //Read & Write, Auto clear by ASIC.
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#define SDCARD_DATA_REC_CTRL_DATA_STOP_EN (1 << 1) //Read & Write, Auto clear by ASIC.
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#define SDCARD_DATA_REC_CTRL_DATA_BUS (1 << 2) //4 data wires or 1 data wire.
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#define SDCARD_DATA_REC_CTRL_DATA_MUL_BLK (1 << 3)
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#define SDCARD_DATA_REC_CTRL_BLK_SIZE_MASK (0xfff)
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#define SDCARD_DATA_REC_CTRL_BLK_SIZE_POSI (4)
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#define SDCARD_DATA_REC_CTRL_DATA_WR_DATA_EN (1 << 16) //Read & Write, Auto clear by ASIC.
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#define SDCARD_DATA_REC_CTRL_DATA_BYTE_SEL (1 << 17)
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#define REG_SDCARD_DATA_REC_TIMER (SDCARD_BASE_ADDR + 4*4)
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#define REG_SDCARD_CMD_RSP_AGUMENT0 (SDCARD_BASE_ADDR + 5*4)
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#define REG_SDCARD_CMD_RSP_AGUMENT1 (SDCARD_BASE_ADDR + 6*4)
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#define REG_SDCARD_CMD_RSP_AGUMENT2 (SDCARD_BASE_ADDR + 7*4)
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#define REG_SDCARD_CMD_RSP_AGUMENT3 (SDCARD_BASE_ADDR + 8*4)
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#define REG_SDCARD_CMD_RSP_INT_SEL (SDCARD_BASE_ADDR + 9*4)
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#define SDCARD_CMDRSP_NORSP_END_INT (1 << 0)
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#define SDCARD_CMDRSP_RSP_END_INT (1 << 1)
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#define SDCARD_CMDRSP_TIMEOUT_INT (1 << 2)
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#define SDCARD_CMDRSP_DATA_REC_END_INT (1 << 3)
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#define SDCARD_CMDRSP_DATA_WR_END_INT (1 << 4)
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#define SDCARD_CMDRSP_DATA_TIME_OUT_INT (1 << 5)
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#define SDCARD_CMDRSP_RX_FIFO_NEED_READ (1 << 6)
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#define SDCARD_CMDRSP_TX_FIFO_NEED_WRITE (1 << 7)
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#define SDCARD_CMDRSP_RX_OVERFLOW (1 << 8)
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#define SDCARD_CMDRSP_TX_FIFO_EMPTY (1 << 9)
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#define SDCARD_CMDRSP_CMD_CRC_OK (1 << 10)
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#define SDCARD_CMDRSP_CMD_CRC_FAIL (1 << 11)
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#define SDCARD_CMDRSP_DATA_CRC_OK (1 << 12)
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#define SDCARD_CMDRSP_DATA_CRC_FAIL (1 << 13)
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#define SDCARD_CMDRSP_RSP_INDEX (0x3f<<14)
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#define SDCARD_CMDRSP_WR_STATU (0x7<<20)
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#define SDCARD_CMDRSP_DATA_BUSY (0x1<<23)
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#define REG_SDCARD_CMD_RSP_INT_MASK (SDCARD_BASE_ADDR + 10*4)
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#define SDCARD_CMDRSP_NORSP_END_INT_MASK (1 << 0)
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#define SDCARD_CMDRSP_RSP_END_INT_MASK (1 << 1)
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#define SDCARD_CMDRSP_TIMEOUT_INT_MASK (1 << 2)
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#define SDCARD_CMDRSP_DATA_REC_END_INT_MASK (1 << 3)
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#define SDCARD_CMDRSP_DATA_WR_END_INT_MASK (1 << 4)
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#define SDCARD_CMDRSP_DATA_TIME_OUT_INT_MASK (1 << 5)
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#define SDCARD_CMDRSP_RX_FIFO_NEED_READ_MASK (1 << 6)
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#define SDCARD_CMDRSP_TX_FIFO_NEED_WRITE_MASK (1 << 7)
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#define SDCARD_CMDRSP_RX_OVERFLOW_MASK (1 << 8)
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#define SDCARD_CMDRSP_TX_FIFO_EMPTY_MASK (1 << 9)
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#if CONFIG_SOC_BK7256XX
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#define SDIO_REG0XA_TX_FIFO_NEED_WRITE_MASK_CG_POS (13)
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#define SDIO_REG0XA_TX_FIFO_NEED_WRITE_MASK_CG_MASK (0x1)
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#define SDIO_REG0XA_WRITE_WAIT_JUMP_SEL_POS (14)
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#define SDIO_REG0XA_WRITE_WAIT_JUMP_SEL_MASK (0x1)
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#define SDIO_REG0XA_IDLE_STOP_JUMP_SEL_POS (15)
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#define SDIO_REG0XA_IDLE_STOP_JUMP_SEL_MASK (0x1)
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#define SDIO_REG0XA_RESERVED0_POS (16)
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#define SDIO_REG0XA_RESERVED0_MASK (0xFFFF)
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#else
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#define SDIO_REG0XA_RESERVED0_POS (13)
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#define SDIO_REG0XA_RESERVED0_MASK (0x7FFFF)
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#endif
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#define REG_SDCARD_WR_DATA_ADDR (SDCARD_BASE_ADDR + 11*4)
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#define REG_SDCARD_RD_DATA_ADDR (SDCARD_BASE_ADDR + 12*4)
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#define REG_SDCARD_FIFO_THRESHOLD (SDCARD_BASE_ADDR + 13*4)
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#define SDCARD_FIFO_RX_FIFO_THRESHOLD_MASK (0xff)
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#define SDCARD_FIFO_RX_FIFO_THRESHOLD_POSI (0)
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#define SDCARD_FIFO_TX_FIFO_THRESHOLD_MASK (0xff)
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#define SDCARD_FIFO_TX_FIFO_THRESHOLD_POSI (8)
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#define SDCARD_FIFO_RX_FIFO_RST (1 << 16)
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#define SDCARD_FIFO_TX_FIFO_RST (1 << 17)
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#define SDCARD_FIFO_RXFIFO_RD_READY (1 << 18)
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#define SDCARD_FIFO_TXFIFO_WR_READY (1 << 19)
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#define SDCARD_FIFO_SD_STA_RST (1 << 20)
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#define SDCARD_FIFO_SD_RATE_SELECT_POSI (21)
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#define SDCARD_FIFO_SD_RATE_SELECT_MASK (0x3)
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#if CONFIG_SOC_BK7256XX
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#define SDIO_REG0XD_SD_RD_WAIT_SEL_POS (23)
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#define SDIO_REG0XD_SD_RD_WAIT_SEL_MASK (0x1)
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#define SDIO_REG0XD_SD_RD_WAIT_SEL (0x1 << SDIO_REG0XD_SD_RD_WAIT_SEL_POS)
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#define SDIO_REG0XD_SD_WR_WAIT_SEL_POS (24)
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#define SDIO_REG0XD_SD_WR_WAIT_SEL_MASK (0x1)
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#define SDIO_REG0XD_CLK_REC_SEL_POS (25)
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#define SDIO_REG0XD_CLK_REC_SEL_MASK (0x1)
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#define SDIO_REG0XD_CLK_REC_SEL (0x1<<SDIO_REG0XD_CLK_REC_SEL_POS)
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#endif
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#if CONFIG_SOC_BK7256XX
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#define SDIO_REG0XD_SAMP_SEL_POS (26)
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#define SDIO_REG0XD_SAMP_SEL_MASK (0x1)
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#define SDIO_REG0XD_CLK_GATE_ON_POS (27)
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#define SDIO_REG0XD_CLK_GATE_ON_MASK (0x1)
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#define SDIO_REG0XD_HOST_WR_BLK_EN_POS (28)
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#define SDIO_REG0XD_HOST_WR_BLK_EN_MASK (0x1)
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#define SDIO_REG0XD_HOST_RD_BLK_EN_POS (29)
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#define SDIO_REG0XD_HOST_RD_BLK_EN_MASK (0x1)
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#define SDIO_REG0XD_RESERVED0_POS (30)
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#define SDIO_REG0XD_RESERVED0_MASK (0x3)
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#endif
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// SDcard defination
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/* Exported types ------------------------------------------------------------*/
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typedef enum {
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SD_OK = 0,
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SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
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SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */
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SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
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SD_DATA_TIMEOUT = (4), /*!< Data time out */
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SD_INVALID_VOLTRANGE,
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SD_R5_ERROR, /* A general or an unknown error occurred during the operation */
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SD_R5_ERR_FUNC_NUMB, /* An invalid function number was requested */
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SD_R5_OUT_OF_RANGE, /*The command's argument was out of the allowed range for this card*/
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SD_ERROR,
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SD_ERR_LONG_TIME_NO_RESPONS,
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SD_ERR_CMD41_CNT = 0xfffe
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} SDIO_Error;
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#define SD_CMD_NORESP 0
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#define SD_CMD_SHORT (CMD_FLAG_RESPONSE|CMD_FLAG_CRC_CHECK)
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#define SD_CMD_LONG (CMD_FLAG_RESPONSE|CMD_FLAG_LONG_CMD\
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|CMD_FLAG_CRC_CHECK)
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#define SD_CMD_RSP (SDCARD_CMDRSP_NORSP_END_INT\
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|SDCARD_CMDRSP_RSP_END_INT\
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|SDCARD_CMDRSP_TIMEOUT_INT\
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|SDCARD_CMDRSP_CMD_CRC_FAIL)
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#define SD_DATA_RSP (SDCARD_CMDRSP_DATA_REC_END_INT\
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|SDCARD_CMDRSP_DATA_CRC_FAIL\
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|SDCARD_CMDRSP_DATA_WR_END_INT\
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|SDCARD_CMDRSP_DATA_TIME_OUT_INT)
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#define SD_DATA_DIR_RD 0
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#define SD_DATA_DIR_WR 1
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#define OCR_MSK_BUSY 0x80000000 // Busy flag
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#define OCR_MSK_HC 0x40000000 // High Capacity flag
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#define OCR_MSK_VOLTAGE_3_2V_3_3V 0x00100000 // Voltage 3.2V to 3.3V flag
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#define OCR_MSK_VOLTAGE_ALL 0x00FF8000 // All Voltage flag
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#define SD_DEFAULT_OCR (OCR_MSK_VOLTAGE_ALL|OCR_MSK_HC)
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#define SD_MAX_VOLT_TRIAL (0xFF)
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#define SD_DEFAULT_BLOCK_SIZE 512
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#define SDCARD_TX_FIFO_THRD (0x01) // 16byte
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#define SDCARD_RX_FIFO_THRD (0x01)
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#if (CONFIG_SOC_BK7256XX) //Temp code, clock module should re-arch.
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//320M:divider 0:/2 1:/4 2:/6 3:/8 4:/10 5:/12 6:/16 7:/256
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//The SDIO supports max clock is 80M, or data transfer is error
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#define CLK_80M 9 //(divider == 4,value == b[16-14]'001;clk_src == 320M,value == b[17]'1;together == b[17-14]'1001)
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//#define CLK_53M 10 //(divider == 6,value == b[16-14]'010;clk_src == 320M,value == b[17]'1;together == b[17-14]'1010)
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#define CLK_40M 11 //(divider == 8,value == b[16-14]'011;clk_src == 320M,value == b[17]'1;together == b[17-14]'1011)
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#define CLK_20M 14 //(divider == 16,value == b[16-14]'110;clk_src == 320M,value == b[17]'1;together == b[17-14]'1110)
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//XTL 26M:divider 0:/2 1:/4 2:/6 3:/8 4:/10 5:/12 6:/16 7:/256
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#define CLK_13M 0 //(divider == 2,value == b[16-14]'000;clk_src == 26M,value == b[17]'0;together == b[17-14]'0000)
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#define CLK_6_5M 1 //(divider == 4,value == b[16-14]'001;clk_src == 26M,value == b[17]'0;together == b[17-14]'0001)
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#define CLK_100K 7 //(divider == 256,value == b[16-14]'111;clk_src == 26M,value == b[17]'0;together == b[17-14]'0111)
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#define CLK_LOWEST (CLK_100K)
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#define CMD_TIMEOUT_100K 2500
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#define DATA_TIMEOUT_100K 10000
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#define CMD_TIMEOUT_6_5_M 300000 //about 150ns per cycle (45ms)
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#define DATA_TIMEOUT_6_5_M 3000000 //450ms
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#define CMD_TIMEOUT_13M 600000 //about 77ns pr cycle (45ms)
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#define DATA_TIMEOUT_13M 6000000 //450ms
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#define CMD_TIMEOUT_20M 1000000
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#define DATA_TIMEOUT_20M 10000000
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#define CMD_TIMEOUT_40M 2000000
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#define DATA_TIMEOUT_40M 20000000
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#define CMD_TIMEOUT_80M 4000000
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#define DATA_TIMEOUT_80M 40000000
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#else
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#define CLK_26M 0
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#define CLK_13M 1
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#define CLK_6_5M 2
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#define CLK_200K 3
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#define CLK_LOWEST (CLK_200K)
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#define CMD_TIMEOUT_200K 5000 //about 5us per cycle (25ms)
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#define DATA_TIMEOUT_200K 20000 //100ms
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#define CMD_TIMEOUT_6_5_M 300000 //about 150ns per cycle (45ms)
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#define DATA_TIMEOUT_6_5_M 3000000 //450ms
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#define CMD_TIMEOUT_13M 600000 //about 77ns pr cycle (45ms)
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#define DATA_TIMEOUT_13M 6000000 //450ms
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#define CMD_TIMEOUT_26M 1200000//about 38ns pr cycle (45ms)
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#define DATA_TIMEOUT_26M 12000000 //450ms
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#endif
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#define CMD_FLAG_RESPONSE 0x01
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#define CMD_FLAG_LONG_CMD 0x02
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#define CMD_FLAG_CRC_CHECK 0x04
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#define CMD_FLAG_MASK 0x07
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#define SDIO_RD_DATA 0
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#define SDIO_WR_DATA 1
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#define SDIO_RD_AF_WR 2
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#define SDIO_DEF_LINE_MODE 4
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#define SDIO_DEF_WORK_CLK 13
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#define SD_CLK_PIN_TIMEOUT1 0x1000
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#define SD_CLK_PIN_TIMEOUT2 0x8000
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#define SD_CARD_OFFLINE 0
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#define SD_CARD_ONLINE 1
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//#define CONFIG_SDCARD_BUSWIDTH_4LINE
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// interface function
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void sdio_set_clock(UINT8 clk_index);
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void sdio_gpio_config(void);
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#if CONFIG_SOC_BK7256XX
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void sdio_clk_gate_config(uint8_t enable);
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#endif
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void sdio_clk_config(UINT8 enable);
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void sdio_register_reset(void);
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void sdio_sendcmd_function(UINT8 cmd_index, UINT32 flag,
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UINT32 timeout, VOID *arg);
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SDIO_Error sdio_wait_cmd_response(UINT32 cmd);
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void sdio_get_cmdresponse_argument(UINT8 num, UINT32 *resp);
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void sdio_setup_data(UINT32 data_dir, UINT32 byte_len);
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void sdio_set_data_timeout(UINT32 timeout);
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SDIO_Error sdcard_wait_receive_data(UINT8 *receive_buf);
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//SDIO_Error sdcard_wait_write_end(void);
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//SDIO_Error sdcard_write_data(UINT8 *writebuff, UINT32 block);
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void driver_sdcard_recv_data_start(int timeout);
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//uint8 sd_clk_is_attached(void);
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//uint8 sd_is_attached(void);
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//void sdio_register_reenable(void);
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int wait_Receive_Data(void);
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#endif
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