158 lines
3.2 KiB
C
Executable File
158 lines
3.2 KiB
C
Executable File
#include "mbox0_drv.h"
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#include "sys_driver.h"
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#include "mbox0_fifo_cfg.h"
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static mbox0_dev_t mbox0_dev;
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static u8 mbox0_init = 0;
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static mbox0_fifo_cfg_t fifo_cfg[] = MBOX0_FIFO_CFG_TABLE;
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static int mbox0_drv_cfg_fifo(uint8_t fifo_start, uint8_t fifo_length)
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{
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return mbox0_dev.chn_drv[SELF_CHNL]->chn_cfg_fifo(&mbox0_dev.hal, fifo_start, fifo_length);
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}
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static int mbox0_drv_recieve_message(mbox0_message_t* message)
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{
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return mbox0_dev.chn_drv[SELF_CHNL]->chn_recv(&mbox0_dev.hal, message);
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}
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static void mbox0_drv_isr_handler(void)
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{
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uint32_t int_status;
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uint32_t fifo_status;
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mbox0_message_t message;
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int_status = mbox0_dev.chn_drv[SELF_CHNL]->chn_get_int_status(&mbox0_dev.hal);
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if(int_status == 0)
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return;
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do
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{
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fifo_status = mbox0_dev.chn_drv[SELF_CHNL]->chn_get_rx_fifo_stat(&mbox0_dev.hal);
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if(fifo_status & RX_FIFO_STAT_NOT_EMPTY)
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{
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mbox0_drv_recieve_message(&message);
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if(mbox0_dev.rx_callback != NULL)
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mbox0_dev.rx_callback(&message);
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}
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else
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{
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break;
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}
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} while(1);
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}
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int mbox0_drv_get_send_stat(uint32_t dest_cpu)
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{
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uint32_t fifo_status;
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if(dest_cpu >= MBOX_CHNL_NUM)
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{
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return MBOX0_HAL_SW_PARAM_ERR;
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}
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fifo_status = mbox0_dev.chn_drv[dest_cpu]->chn_get_rx_fifo_stat(&mbox0_dev.hal);
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if(RX_FIFO_STAT_FULL & fifo_status)
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{
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return MBOX0_HAL_SW_FIFO_FULL;
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}
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return MBOX0_HAL_OK;
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}
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int mbox0_drv_send_message(mbox0_message_t* message)
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{
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return mbox0_dev.chn_drv[SELF_CHNL]->chn_send(&mbox0_dev.hal, message);
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}
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int mbox0_drv_callback_register(mbox0_rx_callback_t callback)
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{
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mbox0_dev.rx_callback = callback;
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return 0;
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}
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int mbox0_drv_init(void)
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{
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if(mbox0_init == 1)
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return 0;
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mbox0_dev.chn_drv[0] = &hal_chn0_drv;
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mbox0_dev.chn_drv[1] = &hal_chn1_drv;
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mbox0_dev.chn_drv[2] = &hal_chn2_drv;
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mbox0_dev.rx_callback = NULL;
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mbox0_hal_init(&mbox0_dev.hal);
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if(SELF_CHNL == 0)
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{
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mbox0_hal_dev_init(&mbox0_dev.hal); /* can only be initialized by CPU0. */
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mbox0_hal_set_reg_0x2_chn_pro_disable(&mbox0_dev.hal, 1); /* channel unprotect*/
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}
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mbox0_drv_cfg_fifo(fifo_cfg[SELF_CHNL].start, fifo_cfg[SELF_CHNL].len);
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/* clear/empty RX FIFO. */
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while(1)
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{
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mbox0_message_t message;
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uint32_t fifo_status = mbox0_dev.chn_drv[SELF_CHNL]->chn_get_rx_fifo_stat(&mbox0_dev.hal);
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if(fifo_status & RX_FIFO_STAT_NOT_EMPTY)
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{
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mbox0_drv_recieve_message(&message);
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}
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else
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{
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break;
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}
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}
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int int_src = INT_SRC_MAILBOX;
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bk_int_isr_register(int_src, mbox0_drv_isr_handler, NULL);
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mbox0_dev.chn_drv[SELF_CHNL]->chn_int_enable(&mbox0_dev.hal, 1);
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sys_drv_int_group2_enable(1 << (int_src - 32));
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mbox0_init = 1;
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return 0;
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}
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int mbox0_drv_deinit(void)
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{
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if(mbox0_init == 0)
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return -1;
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uint8_t int_src = INT_SRC_MAILBOX;
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sys_drv_int_group2_disable(1 << (int_src - 32));
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mbox0_dev.chn_drv[SELF_CHNL]->chn_int_enable(&mbox0_dev.hal, 0);
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bk_int_isr_unregister(int_src);
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if(SELF_CHNL == 0)
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mbox0_hal_dev_deinit(&mbox0_dev.hal); /* can only be de-initialized by CPU0. */
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mbox0_hal_deinit(&mbox0_dev.hal);
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mbox0_dev.rx_callback = NULL;
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mbox0_init = 0;
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return 0;
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}
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