76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
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// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <soc/soc.h>
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#include "hal_port.h"
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#include "trng_hw.h"
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#include <driver/hal/hal_trng_types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define TRNG_LL_REG_BASE(_trng_unit_id) (SOC_TRNG_REG_BASE)
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static inline void trng_ll_soft_reset(trng_hw_t *hw)
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{
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hw->global_ctrl.soft_reset = 1;
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}
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static inline uint32_t trng_ll_get_device_id(trng_hw_t *hw)
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{
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return hw->dev_id;
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}
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static inline uint32_t trng_ll_get_version_id(trng_hw_t *hw)
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{
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return hw->dev_version;
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}
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static inline uint32_t trng_ll_get_dev_status(trng_hw_t *hw)
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{
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return hw->dev_status;
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}
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static inline void trng_ll_init(trng_hw_t *hw)
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{
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trng_ll_soft_reset(hw);
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hw->ctrl.en = 0;
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}
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static inline void trng_ll_enable(trng_hw_t *hw)
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{
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hw->global_ctrl.soft_reset = 1;
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hw->global_ctrl.clk_gate_bypass = 1; //clock gate enable will make trng get same value every first time get
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hw->ctrl.en = 1;
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}
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static inline void trng_ll_disable(trng_hw_t *hw)
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{
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hw->ctrl.en = 0;
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hw->global_ctrl.clk_gate_bypass = 0;
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}
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static inline uint32_t trng_ll_get_random_data(trng_hw_t *hw)
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{
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return hw->data;
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}
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#ifdef __cplusplus
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}
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#endif
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