192 lines
5.4 KiB
C
192 lines
5.4 KiB
C
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// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "cli.h"
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#include <driver/int.h>
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#include "pwm_hal.h"
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#include "gpio_hal.h"
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#include "gpio_driver_base.h"
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#include "icu_driver.h"
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#include "clock_driver.h"
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#include "power_driver.h"
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typedef struct {
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pwm_chan_t chan1;
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pwm_chan_t chan2;
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bool is_valid;
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} pwm_group_info_t;
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#define PWM_GROUP_NUM (SOC_PWM_CHAN_NUM_PER_UNIT >> 1)
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typedef struct {
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pwm_hal_t hal;
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//Important notes: currently no lock for bits
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//Concurrently operation is NOT allowed!!!
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uint32_t chan_init_bits;
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pwm_group_info_t groups[PWM_GROUP_NUM];
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} pwm_driver_t;
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#if CONFIG_PWM
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extern pwm_driver_t s_pwm;
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#endif
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extern gpio_driver_t s_gpio;
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static void cli_icu_help(void)
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{
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CLI_LOGI("icu {init|deinit|get_int_statis}\n");
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CLI_LOGI("icu_control {power_on_pwm| power_down_pwm|enable_pwm_int|disable_pwm_int|\
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set_pwm_26m|set_pwm_dco|enable_pwm_lpo|disable_pwm_lpo|pwm_isr_register\
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|gpio_isr_register chan}\n");
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}
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#if CONFIG_PWM
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static void cli_int_service_pwm_isr(void)
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{
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#if CONFIG_PWM_V1PX
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CLI_LOGI("TODO:PWM ASIC IP V1PX\r\n");
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#else
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pwm_hal_t *hal = &s_pwm.hal;
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uint32_t int_status;
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int chan;
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int_status = pwm_hal_get_interrupt_status(hal);
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pwm_hal_clear_interrupt_status(hal, int_status);
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for (chan = 0; chan < SOC_PWM_CHAN_NUM_PER_UNIT; chan++) {
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if (pwm_hal_is_interrupt_triggered(hal, chan, int_status)) {
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CLI_LOGI("pwm change register isr test :pwm[%d] isr\r\n", chan);
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}
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}
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#endif
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}
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#endif
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static void cli_int_service_gpio_isr(void)
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{
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gpio_hal_t *hal = &s_gpio.hal;
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gpio_interrupt_status_t gpio_status;
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int gpio_id;
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gpio_hal_get_interrupt_status(hal, &gpio_status);
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gpio_hal_clear_interrupt_status(hal, &gpio_status);
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for (gpio_id = 0; gpio_id < SOC_GPIO_NUM; gpio_id++) {
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if (gpio_hal_is_interrupt_triggered(hal, gpio_id, &gpio_status)) {
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CLI_LOGI("gpio change register isr test :gpio[%d] isr\r\n", gpio_id);
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}
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}
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}
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static void cli_icu_int_cmd(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
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{
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if (argc < 2) {
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cli_icu_help();
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return;
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}
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if (os_strcmp(argv[1], "init") == 0) {
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BK_LOG_ON_ERR(bk_icu_driver_init());
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CLI_LOGI("icu intterupt init\n");
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} else if(os_strcmp(argv[1], "deinit") == 0) {
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BK_LOG_ON_ERR(bk_icu_driver_deinit());
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CLI_LOGI("icu interrupt deinit\n");
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}
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#if CONFIG_INT_STATIS
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else if(os_strcmp(argv[1], "get_int_statis") == 0) {
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int_statis_t *int_st = {0};
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int_st = bk_get_int_statis();
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BK_LOG_ON_ERR(bk_dump_int_statis(int_st));
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CLI_LOGI("icu get interrupt statistic\n");
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}
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#endif
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else if(os_strcmp(argv[1], "pwm_isr_register") == 0) {
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#if CONFIG_PWM
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bk_int_isr_register(INT_SRC_PWM, cli_int_service_pwm_isr, NULL);
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CLI_LOGI("pwm registert isr change test\n");
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#else
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CLI_LOGI("pwm does not supported\n");
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#endif
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} else if(os_strcmp(argv[1], "gpio_isr_register") == 0) {
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bk_int_isr_register(INT_SRC_GPIO, cli_int_service_gpio_isr, NULL);
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CLI_LOGI("gpio register isr changing test\n");
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} else if(os_strcmp(argv[1], "set_pwm_int_pri") == 0) {
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uint32_t pri = os_strtoul(argv[2], NULL, 10);
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bk_int_set_priority(INT_SRC_PWM, pri);
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CLI_LOGI("pwm int priority changing test\n");
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}else if(os_strcmp(argv[1], "set_gpio_int_pri") == 0) {
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uint32_t pri = os_strtoul(argv[2], NULL, 10);
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bk_int_set_priority(INT_SRC_GPIO, pri);
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CLI_LOGI("gpio int priority changing test\n");
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}else {
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cli_icu_help();
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return;
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}
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}
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static void cli_icu_control_cmd(char *pcWriteBuffer, int xWriteBufferLen, int argc, char **argv)
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{
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uint32_t chan;
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if (argc < 2)
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{
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cli_icu_help();
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return;
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}
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chan = os_strtoul(argv[2], NULL, 10);
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if (os_strcmp(argv[1], "power_on_pwm") == 0)
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{
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power_pwm_pwr_up(chan);
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CLI_LOGI("pwr up pwm channel %d\n", chan);
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} else if (os_strcmp(argv[1], "power_down_pwm") == 0) {
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power_pwm_pwr_down(chan);
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CLI_LOGI("pwr down pwm channel %d\n", chan);
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} else if (os_strcmp(argv[1], "enable_pwm_int") == 0) {
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icu_enable_pwm_interrupt();
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icu_enable_pwm2_interrupt();
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} else if (os_strcmp(argv[1], "disable_pwm_int") == 0) {
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icu_disable_pwm_interrupt();
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icu_disable_pwm2_interrupt();
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} else if (os_strcmp(argv[1], "set_pwm_26m") == 0) {
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clk_set_pwms_clk_26m();
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} else if (os_strcmp(argv[1], "set_pwm_dco") == 0) {
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clk_set_pwms_clk_dco();
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} else if (os_strcmp(argv[1], "enable_pwm_lpo") == 0) {
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clk_enable_pwm_clk_lpo(chan);
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} else if (os_strcmp(argv[1], "disable_pwm_lpo") == 0) {
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clk_disable_pwm_clk_lpo(chan);
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}else {
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cli_icu_help();
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return;
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}
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}
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#define ICU_CMD_CNT (sizeof(s_icu_commands) / sizeof(struct cli_command))
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static const struct cli_command s_icu_commands[] = {
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{"icu", "icu {init}", cli_icu_int_cmd},
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{"icu_control", "icu {power_on_pwm|power_down_pwm}", cli_icu_control_cmd},
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};
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int cli_icu_init(void)
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{
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BK_LOG_ON_ERR(bk_icu_driver_init());
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return cli_register_commands(s_icu_commands, ICU_CMD_CNT);
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}
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