118 lines
2.8 KiB
C
118 lines
2.8 KiB
C
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// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "efuse_hal.h"
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#include "efuse_ll.h"
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#include <driver/hal/hal_efuse_types.h>
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static int efuse_hal_check_can_write(uint8_t old_byte, uint8_t new_byte)
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{
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if (new_byte == old_byte) {
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/* no need to read */
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return -1;
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}
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for (int i = 0; i < 8; i++) {
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uint8_t old_bit = ((old_byte >> i) & 0x01);
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uint8_t new_bit = ((new_byte >> i) & 0x01);
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if ((old_bit) && (!new_bit)) {
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/* can not change old from 1 to 0 */
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HAL_LOGW("[efuse] cannot change bit[%d] from 1 to 0\r\n", i);
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return -2;
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}
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}
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return 0;
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}
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bk_err_t efuse_hal_init(efuse_hal_t *hal)
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{
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hal->hw = (efuse_hw_t *)EFUSE_LL_REG_BASE(hal->id);
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efuse_ll_init(hal->hw);
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return BK_OK;
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}
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/* 1. check if can write
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* 2. enable efuse vdd2.5v
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* 3. set dir, addr, data, enable
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* 4. wait for operate finished
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* 5. disable efuse vdd2.5v
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* 6. check if write success
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*/
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bk_err_t efuse_hal_write(efuse_hal_t *hal, uint8_t addr, uint8_t wr_data)
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{
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/* read before write, ensure this byte and this bit no wrote */
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int ret;
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uint8_t read_data = 0;
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ret = efuse_hal_read(hal, addr, &read_data);
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if(ret != BK_OK){
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return BK_ERR_EFUSE_READ_FAIL;
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}
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ret = efuse_hal_check_can_write(read_data, wr_data);
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if (ret == -1) {
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return BK_OK;
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}
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if (ret == -2) {
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return BK_ERR_EFUSE_CANNOT_WRTIE;
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}
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efuse_ll_enable_vdd25(hal->hw);
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efuse_ll_set_direction_write(hal->hw);
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efuse_ll_set_addr(hal->hw, addr);
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efuse_ll_set_wr_data(hal->hw, wr_data);
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efuse_ll_enable(hal->hw);
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BK_WHILE (!efuse_ll_is_operate_finished(hal->hw));
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efuse_ll_disable_vdd25(hal->hw);
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ret = efuse_hal_read(hal, addr, &read_data);
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if(ret != BK_OK){
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return BK_ERR_EFUSE_READ_FAIL;
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}
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if (read_data != wr_data) {
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return BK_ERR_EFUSE_WRTIE_NOT_EQUAL;
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}
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return BK_OK;
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}
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/* 1. set addr & direction=read
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* 2. enable efuse
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* 3. wait for efuse operate finished
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* 4. if rd_data valid, read data
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*/
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bk_err_t efuse_hal_read(efuse_hal_t *hal, uint8_t addr, uint8_t *data)
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{
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efuse_ll_set_direction_read(hal->hw);
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efuse_ll_set_addr(hal->hw, addr);
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efuse_ll_enable(hal->hw);
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/* wait for efuse operate finished */
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BK_WHILE (!efuse_ll_is_operate_finished(hal->hw));
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if (efuse_ll_is_rd_data_valid(hal->hw)) {
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*data = efuse_ll_get_rd_data(hal->hw);
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return BK_OK;
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} else {
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return BK_ERR_EFUSE_READ_FAIL;
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}
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}
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