74 lines
3.2 KiB
C
74 lines
3.2 KiB
C
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// Copyright 2020-2021 Beken
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <common/sys_config.h>
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#define BOOT_COLOR_UNUSED 0x5A5A5A5A //Pattern to fill UNUSED stack
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#define BOOT_COLOR_SVC 0x5A5A5A5A //Pattern to fill SVC stack
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#define BOOT_COLOR_IRQ 0x5A5A5A5A //Pattern to fill IRQ stack
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#define BOOT_COLOR_FIQ 0x5A5A5A5A //Pattern to fill FIQ stack
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#define BOOT_COLOR_SYS 0x5A5A5A5A //Pattern to fill SYS stack
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/* Backup [R8~R14], CPSR and SPSR, totally 9 registers */
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#define MCU_REG_BACKUP_NUM 9
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/* From bottom to top, the registers are stored as:
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* bottom => CPSR, SPSR, R8, R9, R10, R11, R12, R13, R14 => top
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* SP(R13) is in offset 7
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* */
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#define MCU_REG_BACKUP_SP_OFFSET (7 << 2)
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#define MCU_REG_BACKUP_ADDR_BASE 0x400020
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#define MCU_REG_BACKUP_STACK_LEN (MCU_REG_BACKUP_NUM << 2)
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#define MCU_REG_BACKUP_BOTTOM_SYS MCU_REG_BACKUP_ADDR_BASE
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#define MCU_REG_BACKUP_TOP_SYS (MCU_REG_BACKUP_BOTTOM_SYS + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_SYS (MCU_REG_BACKUP_BOTTOM_SYS + MCU_REG_BACKUP_SP_OFFSET)
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#define MCU_REG_BACKUP_BOTTOM_IRQ MCU_REG_BACKUP_TOP_SYS
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#define MCU_REG_BACKUP_TOP_IRQ (MCU_REG_BACKUP_BOTTOM_IRQ + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_IRQ (MCU_REG_BACKUP_BOTTOM_IRQ + MCU_REG_BACKUP_SP_OFFSET)
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#define MCU_REG_BACKUP_BOTTOM_FIQ MCU_REG_BACKUP_TOP_IRQ
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#define MCU_REG_BACKUP_TOP_FIQ (MCU_REG_BACKUP_BOTTOM_FIQ + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_FIQ (MCU_REG_BACKUP_BOTTOM_FIQ + MCU_REG_BACKUP_SP_OFFSET)
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#define MCU_REG_BACKUP_BOTTOM_ABT MCU_REG_BACKUP_TOP_FIQ
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#define MCU_REG_BACKUP_TOP_ABT (MCU_REG_BACKUP_BOTTOM_ABT + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_ABT (MCU_REG_BACKUP_BOTTOM_ABT + MCU_REG_BACKUP_SP_OFFSET)
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#define MCU_REG_BACKUP_BOTTOM_UND MCU_REG_BACKUP_TOP_ABT
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#define MCU_REG_BACKUP_TOP_UND (MCU_REG_BACKUP_BOTTOM_UND + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_UND (MCU_REG_BACKUP_BOTTOM_UND + MCU_REG_BACKUP_SP_OFFSET)
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#define MCU_REG_BACKUP_BOTTOM_SVC MCU_REG_BACKUP_TOP_UND
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#define MCU_REG_BACKUP_TOP_SVC (MCU_REG_BACKUP_BOTTOM_SVC + MCU_REG_BACKUP_STACK_LEN)
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#define MCU_REG_BACKUP_SP_SVC (MCU_REG_BACKUP_BOTTOM_SVC + MCU_REG_BACKUP_SP_OFFSET)
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#define FIQ_STACK_SIZE 0xFF0
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#define IRQ_STACK_SIZE 0xFF0
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#define SVC_STACK_SIZE 0x3F0
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#define SYS_STACK_SIZE 0x100
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#define UND_STACK_SIZE 0x280
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#define ABT_STACK_SIZE 0x280
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#ifdef __cplusplus
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}
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#endif
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